Aditya Agrawal
According to our database1,
Aditya Agrawal
authored at least 42 papers
between 1993 and 2024.
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Bibliography
2024
CoRR, 2024
Large Content And Behavior Models To Understand, Simulate, And Optimize Content And Behavior.
Proceedings of the Twelfth International Conference on Learning Representations, 2024
2023
Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing, 2023
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023
2022
Neural Feature-Adaptation for Symbolic Predictions Using Pre-Training and Semantic Loss.
CoRR, 2022
2018
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study.
Proc. ACM Meas. Anal. Comput. Syst., 2018
Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency.
CoRR, 2018
2017
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms.
Proc. ACM Meas. Anal. Comput. Syst., 2017
Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms.
CoRR, 2017
Survive: Pointer-Based In-DRAM Incremental Checkpointing for Low-Cost Data Persistence and Rollback-Recovery.
IEEE Comput. Archit. Lett., 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
2016
Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the Second International Symposium on Memory Systems, 2016
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016
2015
Proceedings of the 2015 Conference on Advances In Robotics, 2015
2014
Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014
2013
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
Refrint: Intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
2010
A General Framework to Measure Organizational Risk during Information Systems Evolution and its Customization.
J. Res. Pract. Inf. Technol., 2010
2007
Proceedings of the Information Systems Development, 2007
ERP-ORE: A Framework to Measure Organizational Risk during ERP Systems Evolution in a Distribution Business.
Proceedings of the Australasian Conference on Information Systems, 2007
2006
Managing the configuration complexity of distributed applications in Internet data centers.
IEEE Commun. Mag., 2006
2004
Proceedings of the 2nd International Workshop on Graph-Based Tools, 2004
Semantic Translation of Simulink/Stateflow Models to Hybrid Automata Using Graph Transformations.
Proceedings of the 2004 Workshop on Graph Transformation and Visual Modelling Techniques, 2004
Proceedings of the Generative Programming and Component Engineering: Third International Conference, 2004
2003
ACM Trans. Model. Comput. Simul., 2003
On the Use of Graph Transformation in the Formal Specification of Model Interpreters.
J. Univers. Comput. Sci., 2003
Estimating the uncertainty of land-cover extrapolations while constructing a raster map from tabular data.
J. Geogr. Syst., 2003
Proceedings of the Companion of the 18th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2003
Proceedings of the Companion of the 18th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2003
Metamodel based model transformation language to facilitate domain specific model driven architecture.
Proceedings of the Companion of the 18th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2003
Graph Rewriting And Transformation (GReAT): A Solution For The Model Integrated Computing (MIC) Bottleneck.
Proceedings of the 18th IEEE International Conference on Automated Software Engineering (ASE 2003), 2003
Proceedings of the 10th IEEE International Conference on Engineering of Computer-Based Systems (ECBS 2003), 2003
Proceedings of the 10th IEEE International Conference on Engineering of Computer-Based Systems (ECBS 2003), 2003
Proceedings of the Applications of Graph Transformations with Industrial Relevance, 2003
1995
Proceedings of the 4th International Conference on Computer Communications and Networks (ICCCN '95), 1995
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995
1993
Proceedings of the Sixth International Conference on VLSI Design, 1993