Adedotun Adeyemo

According to our database, Adedotun Adeyemo authored at least 13 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2019

Efficient and Low Overhead Memristive Activation Circuit for Deep Learning Neural Networks.

Anu Bala, Xiaohan Yang, Adedotun Adeyemo, Abusaleh M. Jabir

J. Low Power Electron., 2019

Novel techniques for memristive multifunction logic design.

Xiaohan Yang, Adedotun Adeyemo, Anu Bala, Abusaleh M. Jabir

Integr., 2019

2018

A Memristive Activation Circuit for Deep Learning Neural Networks.

Anu Bala, Xiaohan Yang, Adedotun Adeyemo, Abusaleh M. Jabir

Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018

2017

Minimising Impact of Wire Resistance in Low-Power Crossbar Array Write Scheme.

Adedotun Adeyemo, Abusaleh M. Jabir, Jimson Mathew

J. Low Power Electron., 2017

Parasitic effects on memristive logic architecture.

Xiaohan Yang, Adedotun Adeyemo, Anu Bala, Abusaleh M. Jabir

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Reliable gas sensing with memristive array.

Adedotun Adeyemo, Abusaleh M. Jabir, Jimson Mathew, Eugenio Martinelli, Corrado Di Natale, Marco Ottavi

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Learning method for ex-situ training of memristor crossbar based multi-layer neural network.

Anu Bala, Adedotun Adeyemo, Xiaohan Yang, Abusaleh M. Jabir

Proceedings of the 9th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2017

2016

Novel memristive logic architectures.

Xiaohan Yang, Adedotun Adeyemo, Anu Bala, Abusaleh M. Jabir

Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

High level abstraction of memristor model for neural network simulation.

Anu Bala, Adedotun Adeyemo, Xiaohan Yang, Abusaleh M. Jabir

Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

Analytic models for crossbar write operation.

Adedotun Adeyemo, Xiaohan Yang, Anu Bala, Abusaleh M. Jabir

Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

Analytic models for crossbar read operation.

Adedotun Adeyemo, Xiaohan Yang, Anu Bala, Jimson Mathew, Abusaleh M. Jabir

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2015

Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays.

Adedotun A. Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan

Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

2014

Write scheme for multiple Complementary Resistive Switch (CRS) cells.

Adedotun Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014