Adán Kohler

According to our database, Adán Kohler authored at least 12 papers between 2009 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Power Management for High-Performance Applications on Network-on-Chip-Based Multiprocessors.

Adán Kohler, Martin Radetzki

Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013

2012

Latency-optimized Collectives for High Performance on Intel's Single-chip Cloud Computer.

Adán Kohler, Martin Radetzki

Proceedings of the Many-core Applications Research Community (MARC) Symposium at RWTH Aachen University, 2012

Optimized Reduce for Mesh-Based NoC Multiprocessors.

Adán Kohler, Martin Radetzki

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Minimal MPI as programming interface for multicore System-on-Chips.

Adán Kohler, Juan Manuel Castillo-Sanchez, Joachim Gross, Martin Radetzki

Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

Low-Latency Collectives for the Intel SCC.

Adán Kohler, Martin Radetzki, Philipp Gschwandtner, Thomas Fahringer

Proceedings of the 2012 IEEE International Conference on Cluster Computing, 2012

2011

Cost-Based Deflection Routing for Intelligent NoC Switches.

Martin Radetzki, Adán Kohler

Proceedings of the Solutions on Embedded Systems, 2011

2010

Fault Tolerant Network on Chip Switching With Graceful Performance Degradation.

Adán Kohler, Gert Schley, Martin Radetzki

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Degradability Enabled Routing for Network-on-Chip Switches (Routingverfahren zur Unterstützung der Degradierbarkeit von Network-on-Chip Switches).

Gert Schley, Martin Radetzki, Adán Kohler

it Inf. Technol., 2010

2009

An intelligent deflection router for networks-on-chip.

Martin Radetzki, Adán Kohler

Proceedings of the Seventh Workshop on Intelligent solutions in Embedded Systems, 2009

Fault-tolerant architecture and deflection routing for degradable NoC switches.

Adán Kohler, Martin Radetzki

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Modellierung und Simulation von Networks-on-Chip mit OSCI TLM2.

Adán Kohler, Martin Radetzki

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009

A SystemC TLM2 model of communication in wormhole switched Networks-On-Chip.

Adán Kohler, Martin Radetzki

Proceedings of the Forum on specification and Design Languages, 2009