Adam Milik

According to our database, Adam Milik authored at least 15 papers between 2005 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Multiple-Core PLC CPU Implementation and Programming.

Adam Milik

J. Circuits Syst. Comput., 2018

2017

Nonlinearity Measurement of a Voltage Ramp Using a Digital Technique.

Adam Milik, Edward Hrynkiewicz

J. Circuits Syst. Comput., 2017

2016

On hardware synthesis and implementation of PLC programs in FPGAs.

Adam Milik

Microprocess. Microsystems, 2016

2013

On Hardware Synthesis of Reconfigurable Logic Controllers from Ladder Diagrams According to IEC61131-3.

Adam Milik

Proceedings of the 12th IFAC Conference on Programmable Devices and Embedded Systems, 2013

2012

Dynamic rescheduling of tasks in time predictable embedded systems.

Andrzej Pulka, Adam Milik

Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

On mapping of DSP48 units for arithmetic operation in reconfigurable logic controllers.

Adam Milik

Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

2011

Automatic implementation of arithmetic operation in reconfigurable logic controllers.

Adam Milik, Andrzej Pulka

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010

Logic synthesis based on decomposition for CPLDs.

Dariusz Kania, Adam Milik

Microprocess. Microsystems, 2010

On efficient implementation of search algorithm for genome patterns.

Adam Milik, Andrzej Pulka

Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

2009

The reconfigurable hardware accelerator for searching genome patterns.

Adam Milik, Andrzej Pulka

Proceedings of the 9th IFAC Workshop on Programmable Devices and Embedded Systems, 2009

Multithread RISC architecture based on programmable interleaved pipelining.

Andrzej Pulka, Adam Milik

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

VEST - An Intelligent Tool for Timing SoCs Verification Using UML Timing Diagrams.

Andrzej Pulka, Adam Milik

Proceedings of the Forum on specification and Design Languages, 2008

2007

Common HDL-Matlab Simulation Environment.

Adam Milik, Andrzej Pulka

Proceedings of the Forum on specification and Design Languages, 2007

2005

Decomposition of Multi-Output Functions for CPLDs.

Dariusz Kania, Adam Milik, Józef Kulisz

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

A Novel Method of Two-Stage Decomposition Dedicated for PAL-based CPLDs.

Dariusz Kania, Józef Kulisz, Adam Milik

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005