Adam Makosiej

According to our database, Adam Makosiej authored at least 20 papers between 2008 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration.

Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy

IEEE J. Solid State Circuits, 2023

2021

Energy Efficient Comparator-Less Current-Mode TFET-CMOS Co-Integrated Scalable Flash ADC.

Navneet Gupta, Hitesh Shrimali, Adam Makosiej, Andrei Vladimirescu, Amara Amara

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020

SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency.

Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2018

Related references for extended TED submission (uDRAM and uSRAM reference papers).

Navneet Gupta, Adam Makosiej, Amara Amara, Andrei Vladimirescu, Costin Anghel

Dataset, December, 2018

Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage Operations in 28 nm 3D Monolithic CoolCubeTM Technology.

Reda Boumchedda, Jean-Philippe Noel, Bastien Giraud, Adam Makosiej, Marco Antonio Rios, Eduardo Esmanhotto, Emilien Bourde-Cicé, Mathis Bellet, David Turgis, Edith Beigné

Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

2017

Tunnel FET based ultra-low-leakage compact 2T1C SRAM.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Tunnel FET based refresh-free-DRAM.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

TFET NDR skewed inverter based sensing method.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Sorin Cotofana, Costin Anghel

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Ultra-compact SRAM design using TFETs for low power low voltage applications.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 46th European Solid-State Device Research Conference, 2016

3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications.

Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes.

Andrei Vladimirescu, Costin Anghel, Amara Amara, Navneet Gupta, Adam Makosiej

Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015

Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications.

Navneet Gupta, Adam Makosiej, Oliver Thomas, Amara Amara, Andrei Vladimirescu, Costin Anghel

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2013

CMOS SRAM scaling limits under optimum stability constraints.

Adam Makosiej, Olivier Thomas, Amara Amara, Andrei Vladimirescu

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

A 32nm tunnel FET SRAM for ultra low leakage.

Adam Makosiej, Rutwick Kumar Kashyap, Andrei Vladimirescu, Amara Amara, Costin Anghel

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Stability and yield-oriented ultra-low-power embedded 6T SRAM cell design optimization.

Adam Makosiej, Olivier Thomas, Andrei Vladimirescu, Amara Amara

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2009

SRAM Voltage and Current Sense Amplifiers in sub-32nm Double-gate CMOS Insensitive to Process Variations and Transistor Mismatch.

Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatch.

Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008