Achuta Thippana
According to our database1,
Achuta Thippana
authored at least 6 papers
between 2016 and 2024.
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Collaborative distances:
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Bibliography
2024
2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2022
A 5nm 3.4GHz Tri-Gear ARMv9 CPU Subsystem in a Fully Integrated 5G Flagship Mobile SoC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoC.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2017
3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016