Achintya Halder
According to our database1,
Achintya Halder
authored at least 19 papers
between 2001 and 2017.
Collaborative distances:
Collaborative distances:
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Bibliography
2017
IET Circuits Devices Syst., 2017
2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014
2012
A Variable RF Carrier Modulation Scheme for Ultralow Power Wireless Body-Area Network.
IEEE Syst. J., 2012
An Ultra-low Power Symbol Detection Methodology and Its Circuit Implementation for a Wake-up Receiver in Wireless Sensor Nodes.
Proceedings of the 25th International Conference on VLSI Design, 2012
An Energy Efficient Oscillator Frequency Calibration Methodology Using Fraction Phase Computation.
Proceedings of the 25th International Conference on VLSI Design, 2012
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
2006
PhD thesis, 2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
2005
Test generation for specification test of analog circuits using efficient test response observation methods.
Microelectron. J., 2005
Alternate Testing of RF Transceivers Using Optimized Test Stimulus for Accurate Prediction of System Specifications.
J. Electron. Test., 2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
A System-Level Alternate Test Approach for Specification Test of RF Transceivers in Loopback Mode.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005
2004
System-level Testing of RF Transmitter Specifications Using Optimized Periodic Bitstreams.
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Automated Test Generation and Test Point Selection for Specification Test of Analog Circuits.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
2003
Automatic Multitone Alternate Test Generation For RF Circuits Using Behavioral Models.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
2002
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
2001
Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001