Abu Khari bin A'Ain

Orcid: 0000-0002-9438-2382

According to our database1, Abu Khari bin A'Ain authored at least 22 papers between 1995 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
CNTFET based Voltage Mode MISO Active only Biquadratic Filter for Multi-GHz Frequency Applications.
Circuits Syst. Signal Process., 2021

2020
A comparative analysis of LFSR cascading for hardware efficiency and high fault coverage in BIST applications.
Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019
Multiple Controlled Antirandom Testing (MCAT) for High Fault Coverage in a Black Box Environment.
IEEE Access, 2019

2018
Horizontal diversity in test generation for high fault coverage.
Turkish J. Electr. Eng. Comput. Sci., 2018

Evaluation of compensation techniques for CMOS operational amplifier design.
Proceedings of the 2018 International Conference on IC Design & Technology, 2018

2017
Pole-zero estimation and analysis of op-amp design with negative Miller compensation.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

2016
Low-Voltage CMOS Switch for High-Speed Rail-To-Rail Sampling.
Circuits Syst. Signal Process., 2016

2015
Pre-charge solution for low-power, area-efficient SAR ADC.
IEICE Electron. Express, 2015

2014
A High Gain and Low Flicker Noise CMOS Mixer with Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor.
Wirel. Pers. Commun., 2014

A Wide Tuning Range Voltage Controlled Oscillator with a High Tunable Active Inductor.
Wirel. Pers. Commun., 2014

High-linear, energy-efficient and area-efficient switching algorithm for high-speed SAR ADCs.
Microelectron. J., 2014

100 MS/S, 10-Bit ADC using Pipelined Successive Approximation.
J. Circuits Syst. Comput., 2014

2013
A Reconfigurable Low-Noise Amplifier Using a Tunable Active Inductor for Multistandard Receivers.
Circuits Syst. Signal Process., 2013

DLPA: Discrepant Low PDP 8-Bit Adder.
Circuits Syst. Signal Process., 2013

2012
The Development of an Online Support Tool for the Teaching and Learning of the IEEE Standard 1500 for Embedded Core-based Integrated Circuits.
Int. J. Online Eng., 2012

Internet based support tool for the teaching and learning of the IEEE standard 1500 for embedded core-based integrated circuits.
Proceedings of the IEEE Global Engineering Education Conference, 2012

2011
Design and Analysis of a Novel Low PDP Full Adder Cell.
J. Circuits Syst. Comput., 2011

2008
Design of CMOS Tunable Image-Rejection Low-Noise Amplifier with Active Inductor.
VLSI Design, 2008

2006
A 2.4-GHz CMOS Tunable Image-Rejection Low-Noise Amplifier with Active Inductor.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

1996
Testing Analogue Circuits by A C Power Supply Voltage.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

1995
Exposing floating gate defects in analogue CMOS circuits by power supply voltage control testing technique.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

On the development of power supply voltage control testing technique for analogue circuits.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995


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