Abishek Manian

According to our database, Abishek Manian authored at least 8 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2021

A Simultaneous Bidirectional Single-Ended Coaxial Link With 24-Gb/s Forward and 312.5-Mb/s Back Channels.

Abishek Manian, Amit Rane, Yongseon Koh, Harsheen Kaur Nat, Michael Lu

IEEE J. Solid State Circuits, 2021

2018

An 80-Gb/s 44-mW Wireline PAM4 Transmitter.

Yikun Chang, Abishek Manian, Long Kong, Behzad Razavi

IEEE J. Solid State Circuits, 2018

A Simultaneous Bidirectional Single-Ended Coaxial Link with 24-Gb/s Forward and 312.5-Mb/s Back Channels.

Abishek Manian, Amit Rane, Yongseon Koh

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

A 32-mW 40-Gb/s CMOS NRZ transmitter.

Yikun Chang, Abishek Manian, Long Kong, Behzad Razavi

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

A 40-Gb/s 14-mW CMOS Wireline Receiver.

Abishek Manian, Behzad Razavi

IEEE J. Solid State Circuits, 2017

2016

23.8 A 40Gb/s 14mW CMOS wireline receiver.

Abishek Manian, Behzad Razavi

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

A 40-Gb/s 9.2-mW CMOS equalizer.

Abishek Manian, Behzad Razavi

Proceedings of the Symposium on VLSI Circuits, 2015

2014

A 32-Gb/s 9.3-mW CMOS equalizer with 0.73-V supply.

Abishek Manian, Behzad Razavi

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014