Abhishek Kamath

According to our database1, Abhishek Kamath authored at least 5 papers between 2009 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2014
An 11.5-ENOB 100-MS/s 8mW dual-reference SAR ADC in 28nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2014


2013
An introductory lab course in Digital Design: On-line and on-site laboratory solution.
Proceedings of the IEEE Global Engineering Education Conference, 2013

2009
A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC.
IEEE J. Solid State Circuits, 2009

A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009


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