Abhisek Dixit

Orcid: 0000-0002-2244-1697

According to our database1, Abhisek Dixit authored at least 7 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2024
Investigation on Positive Bias-Induced Threshold Voltage Instability in GaN-on-Si D-mode Power MIS-HEMTs.
Proceedings of the Device Research Conference, 2024

2023
Reliability of SPST Series-stacked SOI CMOS RF Switches for mmWave Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022
RF Reliability of CMOS-Based Power Amplifier Cell for 5G mmWave Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Deep Cryogenic Temperature TDDB in 45-nm PDSOI N-channel FETs for Quantum Computing Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
Large Signal RF Reliability of 45-nm RFSOI Power Amplifier Cell for Wi-Fi6 Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

2009
Measurement and Analysis of Parasitic Capacitance in FinFETs with High-k Dielectrics and Metal-Gate Stack.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2003
A Novel Dynamic Threshold Operation Using Electrically Induced Junction MOSFET in the Deep Sub-micrometer CMOS Regime.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003


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