Abhijit Ghosh

According to our database, Abhijit Ghosh authored at least 36 papers between 1989 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Natural language processing to identify suicidal ideation and anhedonia in major depressive disorder.

L. Alexander Vance, Leslie Way, Deepali Kulkarni, Emily O. C. Palmer, Abhijit Ghosh, Melissa Unruh, Kelly M. Y. Chan, Amey Girdhari, Joydeep Sarkar

BMC Medical Informatics Decis. Mak., December, 2025

2024

Enhancing pre-trained contextual embeddings with triplet loss as an effective fine-tuning method for extracting clinical features from electronic health record derived mental health clinical notes.

Deepali Kulkarni, Abhijit Ghosh, Amey Girdhari, Shaomin Liu, L. Alexander Vance, Melissa Unruh, Joydeep Sarkar

Nat. Lang. Process. J., 2024

A Plentoptic 3D Vision System.

Agastya Kalra, Vage Taamazyan, Alberto Dall'olio, Raghav Khanna, Tomas Gerlich, Georgia Giannopolou, Guy Stoppi, Daniel Baxter, Abhijit Ghosh, Richard Szeliski, Kartik Venkataraman

Proceedings of the SIGGRAPH Asia 2024 Conference Papers, 2024

2023

Neural Shading Fields for Efficient Facial Inverse Rendering.

Gilles Rainer, Lewis Bridgeman, Abhijit Ghosh

Comput. Graph. Forum, October, 2023

2022

High-performance computation of pricing two-asset American options under the Merton jump-diffusion model on a GPU.

Abhijit Ghosh, Chittaranjan Mishra

Comput. Math. Appl., 2022

2021

A Parallel Cyclic Reduction Algorithm for Pentadiagonal Systems with Application to a Convection-Dominated Heston PDE.

Abhijit Ghosh, Chittaranjan Mishra

SIAM J. Sci. Comput., 2021

Highly efficient parallel algorithms for solving the Bates PIDE for pricing options on a GPU.

Abhijit Ghosh, Chittaranjan Mishra

Appl. Math. Comput., 2021

2017

Regularized Stacked Auto-Encoder Based Pre-training for Generalization of Multi-layer Perceptron.

Prasenjit Dey, Abhijit Ghosh, Tandra Pal

Proceedings of the Theory and Practice of Natural Computing - 6th International Conference, 2017

2000

Formal Verification of Synthesized Mixed Signal Designs Using *BMDs.

Abhijit Ghosh, Ranga Vemuri

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

YAML: A Tool for Hardware Design Visualization and Capture.

Vivek Sinha, Frederic Doucet, Chuck Siska, Rajesh K. Gupta, Stan Y. Liao, Abhijit Ghosh

Proceedings of the 13th International Symposium on System Synthesis, 2000

Methodology for hardware/software co-verification in C/C++ (short paper).

Luc Séméria, Abhijit Ghosh

Proceedings of ASP-DAC 2000, 2000

1999

Formal Verification of Synthesized Analog Designs.

Abhijit Ghosh, Ranga Vemuri

Proceedings of the IEEE International Conference On Computer Design, 1999

Hierarchical Scheduling in High Level Synthesis Using Resource Sharing Across Nested Loops.

Abhijit Ghosh, Sandeep K. Lodha, Ranga Vemuri

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

Hardware Synthesis from C/C++.

Abhijit Ghosh, Joachim Kunkel, Stan Y. Liao

Proceedings of the 1999 Design, 1999

1998

A Methodology for Feature Interaction Detection in the AIN 0.1 Framework.

Fuchun Joseph Lin, Hong Liu, Abhijit Ghosh

IEEE Trans. Software Eng., 1998

Sequential logic optimization for low power using input-disabling precomputation architectures.

José Monteiro, Srinivas Devadas, Abhijit Ghosh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Estimation of average switching activity in combinational logic circuits using symbolic simulation.

José Monteiro, Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer, Jacob K. White

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996

An observability-based code coverage metric for functional simulation.

Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995

Probabilistic manipulation of Boolean functions using free Boolean diagrams.

Amelia Shen, Srinivas Devadas, Abhijit Ghosh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Optimization of combinational and sequential logic circuits for low power using precomputation.

José Monteiro, John Rinderknecht, Srinivas Devadas, Abhijit Ghosh

Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995

1994

Precomputation-based sequential logic optimization for low power.

Mazhar Alidina, José Monteiro, Srinivas Devadas, Abhijit Ghosh, Marios C. Papaefthymiou

IEEE Trans. Very Large Scale Integr. Syst., 1994

1993

Sequential test generation and synthesis for testability at the register-transfer and logic levels.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Probabilistic construction and manipulation of free Boolean diagrams.

Amelia Shen, Srinivas Devadas, Abhijit Ghosh

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Retiming sequential circuits for low power.

José Monteiro, Srinivas Devadas, Abhijit Ghosh

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Boolean factorization using multiple-valued minimization.

Stan Y. Liao, Srinivas Devadas, Abhijit Ghosh

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992

Heuristic minimization of Boolean relations using testing techniques.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

Boolean satisfiability and equivalence checking using general Binary Decision Diagrams.

Pranav Ashar, Abhijit Ghosh, Srinivas Devadas

Integr., 1992

On average power dissipation and random pattern testability of CMOS combinational logic networks.

Amelia Shen, Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Estimation of Average Switching Activity in Combinational and Sequential Circuits.

Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer, Jacob K. White

Proceedings of the 29th Design Automation Conference, 1992

1991

Test generation and verification for highly sequential circuits.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Recent progress in synthesis for testability.

Srinivas Devadas, Kurt Keutzer, Abhijit Ghosh

Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991

1990

Sequential logic synthesis for testability using register-transfer level descriptions.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test.

Pranav Ashar, Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Sequential Test Generation at the Register-Transfer and Logic Levels.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

Verification of Interacting Sequential Circuits.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

Test generation for highly sequential circuits.

Abhijit Ghosh, Srinivas Devadas, A. Richard Newton

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989