Abdolreza Nabavi

Orcid: 0000-0002-0931-5477

According to our database1, Abdolreza Nabavi authored at least 55 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Analysis and Simulation of Current Balancer Circuit for Phase-Gain Correction of Unbalanced Differential Signals.
J. Circuits Syst. Comput., September, 2024

2023
A low-power mm-wave reduced-noise active balun with low-phase and low-gain error using common-gate shorting and DeQ inductor technique.
Microelectron. J., September, 2023

2022
Transconductance Boosting Technique for Bandwidth Extension in Low-Voltage and Low-Noise Optical TIAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Optimum Conditions for Efficient Second-Harmonic Power Generation in mm-Wave Harmonic Oscillators.
IEEE J. Solid State Circuits, 2022

Design and analysis of a tunable broadband 180-degree active coupler with low phase-error and high-directivity using staggering technique.
IET Circuits Devices Syst., 2022

2021
Analysis and design procedure of a mm-Wave Class-E power amplifier.
Microelectron. J., 2021

2020
Analysis of nonidealities of N-path circuits using impulse response.
Int. J. Circuit Theory Appl., 2020

2019
Design and Analysis of an N-Path Filter with High Out-of-Band Rejection Using Feed-Forward Technique.
J. Circuits Syst. Comput., 2019

2018
Stability analysis and compensation technique for low-voltage regulated cascode transimpedance amplifier.
Microelectron. J., 2018

A 219-to-231 GHz Frequency-Multiplier-Based VCO With ~3% Peak DC-to-RF Efficiency in 65-nm CMOS.
IEEE J. Solid State Circuits, 2018

Design and analysis of a millimeter-wave injection locked frequency divider with transconductance boosting technique.
Int. J. Circuit Theory Appl., 2018

2017
A Technique for Enhancing Varactor's Quality Factor in Millimeter-Wave Frequencies.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A Digital Linear-Switching Hybrid Power Amplifier for Envelope Tracking Hybrid Supply Modulators.
J. Circuits Syst. Comput., 2017

2016
A low power low noise amplifier employing negative feedback and current reuse techniques.
Microelectron. J., 2016

A digital predistortion assisted hybrid supply modulator for envelope tracking power amplifiers.
Integr., 2016

An adaptive digital processor for power efficiency enhancement in hybrid supply modulators.
Int. J. Circuit Theory Appl., 2016

Analysis of flicker noise conversion to phase noise in CMOS differential <i>LC</i> oscillators.
Int. J. Circuit Theory Appl., 2016

2015
A MOS Parametric Integrator With Improved Linearity for SC ΣΔ Modulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A dual-tank LC VCO topology approaching towards the maximum thermodynamically-achievable oscillator FoM.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
Design Procedure of Quasi-Class-E Power Amplifier for Low-Breakdown-Voltage Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2012
Low-Power High-Speed Hybrid Wave-Pipeline Architectures for Binary Morphological Dilation.
J. Signal Process. Syst., 2012

Digital predistortion based on frequency domain estimation for OFDM systems with low complexity loop delay compensation.
IEICE Electron. Express, 2012

A merged LNA and mixer with improved noise figure and gain for software defined radio applications.
IEICE Electron. Express, 2012

UWB, high gain and highly linear Gilbert-Cell mixer in K-band.
IEICE Electron. Express, 2012

2011
A high resolution highly linear low spur fractional time-to-digital converter (FTDC) for ADPLL.
IEICE Electron. Express, 2011

Highly linear Post Distortion Cancellation common-gate Gilbert-mixer in Ku-band.
IEICE Electron. Express, 2011

Transformer feedback millimeter-wave VCO with capacitance cancellation technique in 0.18-µm CMOS.
IEICE Electron. Express, 2011

2010
Low-power highly linear UWB CMOS mixer with simultaneous second- and third-order distortion cancellation.
Microelectron. J., 2010

Design and analysis of a reduced phase error digital carrier recovery architecture for high-order quadrature amplitude modulation signals.
IET Commun., 2010

Very low noise current- shaped optimally coupled CMOS LC quadrature VCO.
IEICE Electron. Express, 2010

High-accuracy Comparator-Based Switched-Capacitor structure.
IEICE Electron. Express, 2010

Wideband OFDM receiver using split spectrum processing.
IEICE Electron. Express, 2010

Highly linear mm-wave CMOS low noise amplifier.
IEICE Electron. Express, 2010

An adaptive algorithm for reducing phase error in digital carrier recovery for high-order QAM signals.
IEICE Electron. Express, 2010

Low distortion CMOS class-D amplifier with double-band hysteresis.
IEICE Electron. Express, 2010

A 120dB all CMOS variable gain amplifier based on new exponential equation.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
Performance and Complexity Evaluation of OTR-UWB Receiver.
Int. J. Interdiscip. Telecommun. Netw., 2009

A highly linear gilbert cell OTA with multiple gated transistors for non-coherent UWB receivers.
IEICE Electron. Express, 2009

Design and generation of UWB waveforms with interference elimination on narrow band systems.
IEICE Electron. Express, 2009

Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation.
IEICE Electron. Express, 2009

A New folding & interpolating ADC structure with reduced DNL/INL.
IEICE Electron. Express, 2009

Ultra-wideband CMOS low noise amplifier with Flat Gain.
IEICE Electron. Express, 2009

A UWB LNA with interference rejection using enhanced-Q active inductor.
IEICE Electron. Express, 2009

2008
Low-noise differential transimpedance amplifier structure based on capacitor cross-coupled g<sub>m</sub>-boosting scheme.
Microelectron. J., 2008

OTR-UWB system.
Proceedings of the Wireless Telecommunications Symposium, 2008

2007
An adaptable UWB pulse generator for high-rate applications.
IEICE Electron. Express, 2007

<i>G<sub>m</sub></i>-boosted differential transimpedance amplifier architecture.
IEICE Electron. Express, 2007

A Low-Power High-Speed 4-Bit ADC for DS-UWB Communications.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

2006
A Low-Power High-Rate Modulator for Ultra-Wideband Transmitters.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
An Accurate Fir Approximation of Ideal Fractional Delay Filter with Complex Coefficients in Hilbert Space.
J. Circuits Syst. Comput., 2005

Design of Variable Fractional Delay Fir Filters with Csd Coefficients Using Genetic Algorithm.
J. Circuits Syst. Comput., 2005

2003
Design, Simulation and Implementation of a Low-Power Digital Decimation Filter for G.232 Standard.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

Design of variable fractional delay FIR filters using genetic algorithm.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Design of a low-power Viterbi decoder for wireless communications.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002
Two new methods to design digital filters.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002


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