Abdessatar Abderrahman
According to our database1,
Abdessatar Abderrahman
authored at least 5 papers
between 1994 and 2007.
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Bibliography
2007
New Analog Test Metrics Based on Probabilistic and Deterministic Combination Approaches.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
1999
Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
1997
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997
1996
J. Electron. Test., 1996
1994
Estimation of Simultaneous Switching Power and Ground Noise of Static CMOS Combinational Circuits.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994