Abderrahim Doumar
According to our database1,
Abderrahim Doumar
authored at least 14 papers
between 1999 and 2011.
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2011
Proceedings of the 5th International Conference on Signal Processing and Communication Systems, 2011
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
2007
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
2005
Design of On-Line Testing for SoC with IEEE P1500 Compliant Cores Using Reconfigurable Hardware and Scan Shift.
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
2003
Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey.
IEEE Trans. Very Large Scale Integr. Syst., 2003
2000
Design of Switching Blocks Tolerating Defects/Faults in FPGA Interconnection Resources.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000
1999
Proceedings of the 1999 Pacific Rim International Symposium on Dependable Computing (PRDC 1999), 1999
Proceedings of the 4th European Test Workshop, 1999
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999
Proceedings of the 8th Asian Test Symposium (ATS '99), 1999