Abdelkarim Mercha
According to our database1,
Abdelkarim Mercha
authored at least 43 papers
between 2004 and 2017.
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Bibliography
2017
Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond.
IEEE Trans. Very Large Scale Integr. Syst., 2017
2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
2014
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies.
Proceedings of the 44th European Solid State Device Research Conference, 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process.
Proceedings of the European Solid-State Device Research Conference, 2013
TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
2011
IEEE J. Solid State Circuits, 2011
An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations.
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
2010
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010
Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV).
Proceedings of the IEEE International Conference on 3D System Integration, 2009
2008
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Microelectron. Reliab., 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
Hot-carrier-induced degradation of drain current hysteresis and transients in thin gate oxide floating body partially depleted SOI nMOSFETs.
Microelectron. Reliab., 2006
Impact on the back gate degradation in partially depleted SOI n-MOSFETs by 2-MeV electron irradiation.
Microelectron. Reliab., 2006
Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
Radiation source dependence of performance degradation in thin gate oxide fully-depleted SOI n-MOSFETs.
Microelectron. Reliab., 2005
IEEE J. Solid State Circuits, 2005
Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors.
IEEE J. Solid State Circuits, 2005
IEICE Trans. Electron., 2005
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Degradation of electrical performance and floating body effect in ultra thin gate oxide FD-SOI n-MOSFETs by 7.5-MeV proton irradiation.
Microelectron. Reliab., 2004
A 328 μW 5 GHz voltage-controlled oscillator in 90 nm CMOS with high-quality thin-film post-processed inductor.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004