Abdel-Hameed A. Badawy

J. Supercomput., July, 2024

P-YOLOv8: Efficient and Accurate Real-Time Detection of Distracted Driving.

[BibT_eX]

[DOI]

Mohamed R. Elshamy

Heba M. Emara

Mohamed R. Shoaib

CoRR, 2024

Hiding in Plain Sight: Reframing Hardware Trojan Benchmarking as a Hide&Seek Modification.

[BibT_eX]

[DOI]

CoRR, 2024

Cluster-BPI: Efficient Fine-Grain Blind Power Identification for Defending against Hardware Thermal Trojans in Multicore SoCs.

[BibT_eX]

[DOI]

Mohamed R. Elshamy

Mehdi Elahi

CoRR, 2024

TrojanForge: Adversarial Hardware Trojan Examples with Reinforcement Learning.

[BibT_eX]

[DOI]

CoRR, 2024

Graph Neural Networks for Parameterized Quantum Circuits Expressibility Estimation.

[BibT_eX]

[DOI]

CoRR, 2024

The Seeker's Dilemma: Realistic Formulation and Benchmarking for Hardware Trojan Detection.

[BibT_eX]

[DOI]

CoRR, 2024

TrojanForge: Generating Adversarial Hardware Trojan Examples Using Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

Static Reuse Profile Estimation for Array Applications.

[BibT_eX]

[DOI]

Abdur Razzak

Proceedings of the International Symposium on Memory Systems, 2024

Fine-Grained Clustering-Based Power Identification for Multicores.

[BibT_eX]

[DOI]

Mohamed R. Elshamy

Mehdi Elahi

Proceedings of the 15th IEEE International Green and Sustainable Computing Conference, 2024

2023

Securing Network-on-chips Against Fault-injection and Crypto-analysis Attacks via Stochastic Anonymous Routing.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., July, 2023

Predicting Expressibility of Parameterized Quantum Circuits Using Graph Neural Network.

[BibT_eX]

[DOI]

Diane Oyen

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Multi-Criteria Hardware Trojan Detection: A Reinforcement Learning Approach.

[BibT_eX]

[DOI]

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

LLVM Static Analysis for Program Characterization and Memory Reuse Profile Estimation.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2023

Modeling and Characterizing Shared and Local Memories of the Ampere GPUs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2023

BB-ML: Basic Block Performance Prediction using Machine Learning Techniques.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023

Efficient Intra-Rack Resource Disaggregation for HPC Using Co-Packaged DWDM Photonics.

[BibT_eX]

[DOI]

George Michelogiannakis

Brandon Cook

Liang Yuan Dai

Proceedings of the IEEE International Conference on Cluster Computing, 2023

Scalable Experimental Bounds for Dicke and GHZ States Fidelities.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022

PPT-Multicore: performance prediction of OpenMP applications using reuse profiles and analytical modeling.

[BibT_eX]

[DOI]

J. Supercomput., 2022

Low-overhead Hardware Supervision for Securing an IoT Bluetooth-enabled Device: Monitoring Radio Frequency and Supply Voltage.

[BibT_eX]

[DOI]

Derrick T. Rivera

ACM J. Emerg. Technol. Comput. Syst., 2022

Scalable Experimental Bounds for Entangled Quantum State Fidelities.

[BibT_eX]

[DOI]

CoRR, 2022

BB-ML: Basic Block Performance Prediction using Machine Learning Techniques.

[BibT_eX]

[DOI]

CoRR, 2022

BIC: Blind Identification Countermeasure for Malicious Thermal Sensor Attacks in Mobile SoCs.

[BibT_eX]

[DOI]

Mostafa Abdelrehim

Amin Malekmohammadi

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Performance Evaluation of an Out-of-Order RISC-V CPU: A SPEC INT 2017 Study.

[BibT_eX]

[DOI]

Michael A. Schoenfelder

Proceedings of the IEEE International Performance, 2022

Evaluation of a Novel Scratchpad Memory through Compiler Supported Simulation.

[BibT_eX]

[DOI]

Essa Imhmed

Jonathan E. Cook

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

Quantum Netlist Compiler (QNC).

[BibT_eX]

[DOI]

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

Demystifying the Nvidia Ampere Architecture through Microbenchmarking and Instruction-level Analysis.

[BibT_eX]

[DOI]

Hamdy Abdelkhalik

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

Hardware Trojan Insertion Using Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Novel flexible buffering architectures for 3D-NoCs.

[BibT_eX]

[DOI]

Fayez Gebali

Sustain. Comput. Informatics Syst., 2021

Joint security and performance improvement in multilevel shared caches.

[BibT_eX]

[DOI]

Mohammad Shokrolah Shirazi

Mahdi Amininasab

IET Inf. Secur., 2021

A Divide-and-Conquer Approach to Dicke State Preparation.

[BibT_eX]

[DOI]

CoRR, 2021

A Survey on the Security of Wired, Wireless, and 3D Network-on-Chips.

[BibT_eX]

[DOI]

IEEE Access, 2021

Hybrid, scalable, trace-driven performance modeling of GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the International Conference for High Performance Computing, 2021

Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation.

[BibT_eX]

[DOI]

Ali Eker

Dmitry Ponomarev

Proceedings of the SIGSIM-PADS '21: SIGSIM Conference on Principles of Advanced Discrete Simulation, Virtual Event, USA, 31 May, 2021

Securing network-on-chips via novel anonymous routing.

[BibT_eX]

[DOI]

Proceedings of the NOCS '21: International Symposium on Networks-on-Chip, 2021

Securing on-Chip Communications: An On-The-Fly Encryption Architecture for SoCs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science and Computational Intelligence, 2021

2020

PPT-SASMM: Scalable Analytical Shared Memory Model: Predicting the Performance of Multicore Caches from a Single-Threaded Execution Trace.

[BibT_eX]

[DOI]

Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

NVIDIA GPGPUs Instructions Energy Consumption.

[BibT_eX]

[DOI]

Ammar ElWazir

Youssef Aly

Ayatelrahman Elsayed

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

Fast, accurate, and scalable memory modeling of GPGPUs using reuse profiles.

[BibT_eX]

[DOI]

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Verified instruction-level energy consumption measurement for NVIDIA GPUs.

[BibT_eX]

[DOI]

Ammar ElWazir

Youssef Aly

Ayatelrahman Elsayed

Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

2019

Modeling Shared Cache Performance of OpenMP Programs using Reuse Distance.

[BibT_eX]

[DOI]

CoRR, 2019

Instructions' Latencies Characterization for NVIDIA GPGPUs.

[BibT_eX]

[DOI]

CoRR, 2019

High performance, variation-tolerant CNFET ternary full adder a process, voltage, and temperature variation-resilient design.

[BibT_eX]

[DOI]

Samane Firouzi

Sepehr Tabrizchi

Fazel Sharifi

Comput. Electr. Eng., 2019

PPT-GPU: Scalable GPU Performance Modeling.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2019

FPGA-Accelerated Decision Tree Classifier for Real-Time Supervision of Bluetooth SoC.

[BibT_eX]

[DOI]

Derrick T. Rivera

Youssef Aly

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Supervisory Circuits for Low-Frequency Monitoring of a Communication SoC.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Supervising Communication SoC for Secure Operation Using Machine Learning.

[BibT_eX]

[DOI]

Laura E. Boucheron

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

GPUs Cache Performance Estimation using Reuse Distance Analysis.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Performance Computing and Communications Conference, 2019

An FPGA Decision Tree Classifier to Supervise a Communication SoC.

[BibT_eX]

[DOI]

Derrick T. Rivera

Z. M. Saifullah

Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

Low Overhead Instruction Latency Characterization for NVIDIA GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

POSTER: GPUs Pipeline Latency Analysis.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

Machine Learning Bluetooth Profile Operation Verification via Monitoring the Transmission Pattern.

[BibT_eX]

[DOI]

Laura E. Boucheron

Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2018

A performance study of the time-varying cache behavior: a study on APEX, Mantevo, NAS, and PARSEC.

[BibT_eX]

[DOI]

Patricia Grubel

J. Supercomput., 2018

Energy Efficient Tri-State CNFET Ternary Logic Gates.

[BibT_eX]

[DOI]

Sepehr Tabrizchi

Fazel Sharifi

CoRR, 2018

Evaluating the Fault Tolerance Performance of HDFS and Ceph.

[BibT_eX]

[DOI]

Mai Zheng

Proceedings of the Practice and Experience on Advanced Research Computing, 2018

PPT-GPU: performance prediction toolkit for GPUs identifying the impact of caches: extended abstract.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2018

3D-PIM NoCs with Multiple Subnetworks: A Performance and Power Evaluation.

[BibT_eX]

[DOI]

Jesus Gardea

Yuho Jin

Jonathan E. Cook

Proceedings of the 37th IEEE International Performance Computing and Communications Conference, 2018

Fault Tolerance Performance Evaluation of Large-Scale Distributed Storage Systems HDFS and Ceph Case Study.

[BibT_eX]

[DOI]

Mai Zheng

Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

Initial Explorations of Sparse Matrix-Vector Multiplication on EMU's Migratory Memory Side Processing.

[BibT_eX]

[DOI]

Matthew Bredin

Janice O. McMahon

Shannon K. Kuntz

Proceedings of the IEEE International Conference on Big Data (IEEE BigData 2018), 2018

2017

MorphoNoC: Exploring the design space of a configurable hybrid NoC using nanophotonics.

[BibT_eX]

[DOI]

Vikram K. Narayana

Shuai Sun

Volker J. Sorger

Microprocess. Microsystems, 2017

DyAdHyTM: A Low Overhead Dynamically Adaptive Hybrid Transactional Memory on Big Data Graphs.

[BibT_eX]

[DOI]

Mohammad Qayum

CoRR, 2017

Optimizing thin client caches for mobile cloud computing: : Design space exploration using genetic algorithms.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2017

Guiding Locality Optimizations for Graph Computations via Reuse Distance Analysis.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2017

A brief history of HPC simulation and future challenges.

[BibT_eX]

[DOI]

Kishwar Ahmed

Jason Liu

Proceedings of the 2017 Winter Simulation Conference, 2017

The time-varying nature of cache utilization: A case study on the Mantevo and Apex benchmarks.

[BibT_eX]

[DOI]

Patricia A. Grubel

Proceedings of the 2017 IEEE SmartWorld, 2017

Local memory store (LMStr): A hardware controlled shared scratchpad for multicores.

[BibT_eX]

[DOI]

David Resnick

Proceedings of the 2017 IEEE SmartWorld, 2017

Spare block cache (SprBlk): Fault resilience and reliability at low voltages.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE SmartWorld, 2017

DAdHTM: Low overhead dynamically adaptive hardware transactional memory for large graphs a scalability study.

[BibT_eX]

[DOI]

Mohammad Qayum

Proceedings of the 2017 IEEE SmartWorld, 2017

A Scalable Analytical Memory Model for CPU Performance Prediction.

[BibT_eX]

[DOI]

Satyajayant Misra

Proceedings of the High Performance Computing Systems. Performance Modeling, Benchmarking, and Simulation, 2017

Design of adiabatic MTJ-CMOS hybrid circuits.

[BibT_eX]

[DOI]

Fazel Sharifi

Z. M. Saifullah

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Performance Evaluation of Mesh-based 3D NoCs.

[BibT_eX]

[DOI]

Jesus Gardea

Yuho Jin

Jonathan E. Cook

Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

LMStr: exploring shared hardware controlled scratchpad memory for multicores.

[BibT_eX]

[DOI]

David Resnick

Proceedings of the International Symposium on Memory Systems, 2017

SprBlk cache: enabling fault resilience at low voltages.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Memory Systems, 2017

DyAdHyTM: a low overhead dynamically adaptive hybrid transactional memory with application to large graphs.

[BibT_eX]

[DOI]

Mohammad A. Qayum

Proceedings of the International Symposium on Memory Systems, 2017

Can Architecture Design Help Eliminate Some Common Vulnerabilities?

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Mobile Ad Hoc and Sensor Systems, 2017

Probabilistic Monte Carlo simulations for static branch prediction.

[BibT_eX]

[DOI]

Bhargava Kalla

Proceedings of the 36th IEEE International Performance Computing and Communications Conference, 2017

Optimizing locality in graph computations using reuse distance profiles.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Performance Computing and Communications Conference, 2017

Analyzing Hybrid Transactional Memory Performance Using Intel SDE.

[BibT_eX]

[DOI]

Mohammad A. Qayum

Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

A Probabilistic Monte Carlo Framework for Branch Prediction.

[BibT_eX]

[DOI]

Bhargava Kalla

Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

StAdHyTM: A Statically Adaptive Hybrid Transactional Memory: A scalability study on large parallel graphs.

[BibT_eX]

[DOI]

Mohammad A. Qayum

Proceedings of the IEEE 7th Annual Computing and Communication Workshop and Conference, 2017

2016

Exploiting Hierarchical Locality in Deep Parallel Architectures.

[BibT_eX]

[DOI]

Ahmad Anbar

Engin Kayraklioglu

ACM Trans. Archit. Code Optim., 2016

LMStr: Local memory store the case for hardware controlled scratchpad memory for general purpose processors.

[BibT_eX]

[DOI]

David Resnick

Proceedings of the 35th IEEE International Performance Computing and Communications Conference, 2016

2015

Energy Efficient Job Co-scheduling for High-Performance Parallel Computing Clusters.

[BibT_eX]

[DOI]

David K. Newsom

Sardar F. Azari

Proceedings of the 2015 IEEE International Conference on Smart City/SocialCom/SustainCom/DataCom/SC2 2015, 2015

Big Data Techniques for Scalable In-Band and Out-of-Band HPC Energy Measurement.

[BibT_eX]

[DOI]

David K. Newsom

Sardar F. Azari

Proceedings of the 2015 IEEE International Conference on Smart City/SocialCom/SustainCom/DataCom/SC2 2015, 2015

2014

Where should the threads go? Leveraging hierarchical data locality to solve the thread affinity dilemma.

[BibT_eX]

[DOI]

Ahmad Anbar

Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

"CERE": A CachE Recommendation Engine: Efficient Evolutionary Cache Hierarchy Design Space Exploration.

[BibT_eX]

[DOI]

Gabriel Yessin

Vikram K. Narayana

David Mayhew

Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

2013

Locality Transformations and Prediction Techniques for Optimizing Multicore Memory Performance.

[BibT_eX]

[DOI]

PhD thesis, 2013

Expectations of computing and other STEM students: A comparison for different Class Levels, or (CSE ≠ STEM - CSE) | <sub>course level</sub>.

[BibT_eX]

[DOI]

Karl Robert Bruce Schmitt

Proceedings of the IEEE Frontiers in Education Conference, 2013

2012

Evaluating Discussion Boards on BlackBoard as a Collaborative Learning Tool A Students Survey and Reflections

[BibT_eX]

[DOI]

Michelle M. Hugue

CoRR, 2012

Students Perceptions of the Effectiveness of Discussion Boards What can we get from our students for a freebie point

[BibT_eX]

[DOI]

CoRR, 2012

2011

Effect of breast density in selecting features for normal mammogram detection.

[BibT_eX]

[DOI]

Mona Y. Elshinawy

Wael W. Abdelmageed

Mohamed F. Chouikha

Proceedings of the 8th IEEE International Symposium on Biomedical Imaging: From Nano to Macro, 2011

2010

Pre-CAD system for normal mammogram detection using local binary pattern features.

[BibT_eX]

[DOI]

Mona Y. Elshinawy

Wael W. Abdelmageed

Mohamed F. Chouikha

Proceedings of the IEEE 23rd International Symposium on Computer-Based Medical Systems (CBMS 2010), 2010

Comparing one-class and two-class SVM classifiers for normal mammogram detection.

[BibT_eX]

[DOI]

Mona Y. Elshinawy

Wael W. Abdelmageed

Mohamed F. Chouikha

Proceedings of the 39th IEEE Applied Imagery Pattern Recognition Workshop, 2010

2004

The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems.

[BibT_eX]

[DOI]

Aneesh Aggarwal

Chau-Wen Tseng

J. Instr. Level Parallelism, 2004

2001

Evaluating the impact of memory system performance on software prefetching and locality optimizations.

[BibT_eX]

[DOI]

Aneesh Aggarwal