Aathreya S. Bhat

According to our database, Aathreya S. Bhat authored at least 3 papers between 2013 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A 1-MHz-Bandwidth Continuous-Time Delta-Sigma ADC Achieving >90dB SFDR and >80dB Antialiasing Using Reference-Switched Resistive Feedback DACs.

Sharvil Patil, Raviteja Theertham, Hajime Shibata, Victor Kozlov, Asha Ganesan, Efram Burlingame, Zhao Li, Rama Thakar, Qianqian Zhang, Yue Yin, Aathreya S. Bhat

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2020

16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter.

Hajime Shibata, Gerry Taylor, Bob Schell, Victor Kozlov, Sharvil Patil, Donald Paterson, Asha Ganesan, Yunzhi Dong, Wenhua Yang, Yue Yin, Zhao Li, Prawal Shrestha, Athreya Gopal, Aathreya S. Bhat, Shanthi Pavan

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2013

Template Matching Technique for Panoramic Image Stitching.

Aathreya S. Bhat, Amith V. Shivaprakash, Namrata S. Prasad, Chaitra Nagaraj

Proceedings of the Asia Modelling Symposium 2013, 2013