Aarthy Mani

According to our database, Aarthy Mani authored at least 16 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

1.63 pJ/SOP Neuromorphic Processor With Integrated Partial Sum Routers for In-Network Computing.

Dongrui Li, Ming Ming Wong, Yi Sheng Chong, Jun Zhou, Mohit Upadhyay, Ananta Narayanan Balaji, Aarthy Mani, Weng-Fai Wong, Li-Shiuan Peh, Anh Tuan Do, Bo Wang

IEEE Trans. Very Large Scale Integr. Syst., November, 2024

2023

0.85 mW, 8-bit, 1GS/s, 58dB SFDR Cryogenic DAC for Superconducting Qubit Control Applications.

Chan Kuen Sim, Aarthy Mani, Anh Tuan Do

Proceedings of the 20th International SoC Design Conference, 2023

Cryogenic Characterization of 40nm CMOS for Quantum Control Applications.

Aarthy Mani, Leong Xu Heng Victor, Anh Tuan Do

Proceedings of the 20th International SoC Design Conference, 2023

LAXOR: A Bit-Accurate BNN Accelerator with Latch-XOR Logic for Local Computing.

Dongrui Li, Tomomasa Yamasaki, Aarthy Mani, Anh Tuan Do, Niangjun Chen, Bo Wang

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

1V, 1.13μm pixel pitch Liquid Crystal Driver with Charge-Balancing Scheme for SLM Applications.

Aarthy Mani, Chong Yi Sheng, Di Zhu, Rasna Maruthiyodan Veetil, Moitra Parikshit, Tobias Wilhelm W. Mass, Chong Ser Choong, Xuewu Xu, Ramon José Paniagua Domínguez, Arseniy I. Kuznetsov, P. Krishna, P. Keyi, Kevin Tshun Chuan Chai, Anh Tuan Do

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Stability Analysis of 6T SRAM at Deep Cryogenic Temperature for Quantum Computing Applications.

Seong-Beom Kim, Aarthy Mani, Leong Xu Heng Victor, Yuanjin Zheng, Anh Tuan Do

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing.

Bo Wang, Ming Ming Wong, Dongrui Li, Yi Sheng Chong, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh, Aarthy Mani, Mohit Upadhyay, Ananta Narayanan Balaji, Anh Tuan Do

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips.

Lu Lu, Aarthy Mani, Anh Tuan Do

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Linearity Characterization of Hybrid Driving Scheme for Spatial Light Modulator System.

Z. Di, Aarthy Mani, Anh Tuan Do, A. Baranikov, R. M. Veetil, R. P. Domínguez, Arseniy I. Kuznetsov, Kevin T. C. Chai

Proceedings of the 19th International SoC Design Conference, 2022

2021

Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design.

Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP.

Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, Kevin Tshun Chuan Chai, Anh-Tuan Do

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2020

Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model.

Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM.

Aarthy Mani, Fei Li, Ming Ming Wong, Luo Tao, Liwei Yang, Vishnu Paramasivam, Anh Tuan Do

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron.

Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Tao Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019

Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing.

Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications.

Fei Li, Ming Ming Wong, Aarthy Mani, Vishnu Paramasivam, Anh-Tuan Do

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019