Aaron Severance

According to our database1, Aaron Severance authored at least 9 papers between 2011 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
TinBiNN: Tiny Binarized Neural Network Overlay in about 5, 000 4-LUTs and 5mW.
CoRR, 2019

2015
Wavefront Skipping using BRAMs for Conditional Algorithms on Vector Processors.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
Soft vector processors with streaming pipelines.
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

2013
TputCache: High-frequency, multi-way cache for high-throughput FPGA applications.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Embedded supercomputing in FPGAs with the VectorBlox MXP Matrix Processor.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

2012
VENICE: A compact vector processor for FPGA applications.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Pipeline frequency boosting: Hiding dual-ported block RAM latency using intentional clock skew.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Accelerator compiler for the VENICE vector processor.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
VEGAS: soft vector processor with scratchpad memory.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011


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