Aamer Jaleel
Orcid: 0000-0002-5709-2992
According to our database1,
Aamer Jaleel
authored at least 77 papers
between 2001 and 2024.
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On csauthors.net:
Bibliography
2024
Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation.
CoRR, 2024
ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit Row-Press Mitigation.
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
2023
Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing.
ACM Trans. Comput. Syst., 2023
cuCatch: A Debugging Tool for Efficiently Catching Memory Safety Violations in CUDA Applications.
Proc. ACM Program. Lang., 2023
Proceedings of the Sixth Conference on Machine Learning and Systems, 2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling (Extended Abstract).
Proceedings of the 2023 ACM Workshop on Highlights of Parallel Computing, 2023
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
2020
HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
2019
DUCATI: High-performance Address Translation by Extending TLB Reach of GPU-accelerated Systems.
ACM Trans. Archit. Code Optim., 2019
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
Proceedings of the 46th International Symposium on Computer Architecture, 2019
2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
ACCORD: Enabling Associativity for Gigascale DRAM Caches by Coordinating Way-Install and Way-Prediction.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
2017
Mind The Power Holes: Sifting Operating Points in Power-Limited Heterogeneous Multicores.
IEEE Comput. Archit. Lett., 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
BATMAN: techniques for maximizing system bandwidth of memory systems with stacked-DRAM.
Proceedings of the International Symposium on Memory Systems, 2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Using Personality Metrics to Improve Cache Interference Management in Multicore Processors.
Proceedings of the Computing Frontiers Conference, 2017
2016
ACM Trans. Archit. Code Optim., 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
DReAM: Dynamic Re-arrangement of Address Mapping to Improve the Performance of DRAMs.
Proceedings of the Second International Symposium on Memory Systems, 2016
Proceedings of the Second International Symposium on Memory Systems, 2016
LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures.
ACM Trans. Comput. Syst., 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
High performing cache hierarchies for server workloads: Relaxing inclusion to capture the latency benefits of exclusive caches.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
2014
IEEE Micro, 2014
CAMEO: A Two-Level Memory Organization with Capacity of Main Memory and Flexibility of Hardware-Managed Cache.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014
Proceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers, 2014
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014
2013
ACM Trans. Archit. Code Optim., 2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
Trace alignment algorithms for offline workload analysis of heterogeneous architectures.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013
2012
ACM Trans. Archit. Code Optim., 2012
ACM Trans. Archit. Code Optim., 2012
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012
2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
2010
Achieving Non-Inclusive Cache Performance with Inclusive Caches: Temporal Locality Aware (TLA) Cache Management Policies.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010
2009
Proceedings of the Eighth International Symposium on Parallel and Distributed Computing, 2009
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009
2008
IEEE Micro, 2008
Proceedings of the High Performance Computing, 2008
Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008
2007
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007
Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007
Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007
2006
IEEE Trans. Computers, 2006
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads.
Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006
2005
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions.
Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005
2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
Proceedings of the High Performance Computing - HiPC 2001, 8th International Conference, 2001