A. V. Bugakova

Orcid: 0000-0001-9255-0015

According to our database1, A. V. Bugakova authored at least 20 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
On the Global Stability of Nonlinear Hurwitz Control Systems.
IEEE Trans Autom. Sci. Eng., January, 2024

2021
CJFET Op-Amp without Current Mirrors for Low Temperature Applications.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

Current Mirrors on Complementary Field-Effect Transistors with a Control PN Junction for Low-Temperature and Radiation-Hardened Analog ICs.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

2020
The Research Methodology of Dependence Mode at Parameters Dispersion of a Differential Pair on Integral JFETs in a Radiation-Hardened Structured Array MH2XA010.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Features of JFET Computer Models in Microcurrent Mode on Exposure to Low Temperatures and Neutron Fluence.
Proceedings of the IEEE East-West Design & Test Symposium, 2020

Design of Low-Temperature and Radiation-Hardened JFET Direct Coupled Op-Amps without Current Mirrors.
Proceedings of the European Conference on Circuit Theory and Design, 2020

2019
Mathematical Analysis of Transients of the High-Speed Buffer Amplifier with the Complementary Composite Transistors in Nonlinear Mode.
Proceedings of the 23rd International Conference on System Theory, Control and Computing, 2019

Circuit Features of Multichannel Chips of Reading Electronics of Silicone Photomultiplier Tubes.
Proceedings of the 23rd International Conference on System Theory, Control and Computing, 2019

Silicon Photomultipliers' Analog Interface with Wide Dynamic Range.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Harmonic Distortions in Analog Interfaces Based on Differential Difference Amplifiers.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

Test Chip for Identifying Spice-Parameters of Cryogenic BiFET Circuits.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Estimation to Efficiency of the Using of Anti-Alias Filter in the A/D Interface of Instrumentation and Control Systems.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Method for Speeding a Differential Operational Amplifier in the Invert Connection Circuit.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

Cryogenic Operational Amplifier on Complementary JFETs.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017
The high-speed BiJFet of Op-Amps with reconfigurable architecture.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

Research of operational amplifiers with nonlinear drivers of correction capacity.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2016
The method of speeding of the operational amplifiers based on the folded cascode.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

The radiation-hardened differential difference operational amplifiers for operation in the low-temperature analog interfaces of sensors.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

The drivers of the differential communication lines based on radiation-hardened structured array MH2XA010.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

The analog array chip AC-1.3 for the tasks of tool engineering in conditions of cryogenic temperature, neutron flux and cumulative radiation dose effects.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016


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