A. Rao

According to our database, A. Rao authored at least 3 papers between 2004 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Row-linear feedback shift register-column x-masking technique for simultaneous testing of many-core system chips.

W.-C. Wang, C.-Y. Hsu, James Chien-Mo Li, Y.-C. Sung, A. Rao, L.-T. Wang

IET Comput. Digit. Tech., 2011

2005

The Use of Pre-Evaluation Phase in Dynamic CMOS Logic.

A. Rao, Th. Haniotakis, Y. Tsiatouhas, H. Djemil

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

2004

A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations.

A. Rao, Th. Haniotakis, Y. Tsiatouhas, V. Kaky

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004