A. Purushothaman

Orcid: 0000-0003-2480-4532

According to our database1, A. Purushothaman authored at least 9 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2021
Deep Learning Based Approach for Hardware Trojan Detection.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

2019
Brain Inspired One Shot Learning Method for HD Computing.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

2018
Geometric Programming-Based Power Optimization and Design Automation for a Digitally Controlled Pulse Width Modulator.
Circuits Syst. Signal Process., 2018

Mitigating Aperture Error in Pipelined ADCs Without a Front-end Sample-and-Hold Amplfier.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Assessing the Performance of CMOS Amplifiers Using High-k Dielectric with Metal Gate on High Mobility Substrate.
Proceedings of the Advances in Computing and Data Sciences, 2018

2016
Analysis of regeneration time constant of dynamic latch using Adomian Decomposition method.
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016

MINLP Based Power Optimization for Pipelined ADC.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015
A low power low area capacitor array based Digital to Analog Converter architecture.
Microelectron. J., 2015

A New Delay Model and Geometric Programming-Based Design Automation for Latched Comparators.
Circuits Syst. Signal Process., 2015


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