A. P. Shanthi

According to our database1, A. P. Shanthi authored at least 20 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Sentiment Drift Detection and Analysis in Real Time Twitter Data Streams.
Comput. Syst. Sci. Eng., 2023

2021
An application specific dynamic behaviour model using function-call sequence and memory access-graph for execution integrity verification.
Comput. Secur., 2021

2020
Towards the Design of a Stronger AES: AES with Key Dependent Shift Rows (KDSR).
Wirel. Pers. Commun., 2020

A biologically plausible network model for pattern storage and recall inspired by Dentate Gyrus.
Neural Comput. Appl., 2020

M-PIVAD - Virtual memory based approach against non-control data attacks.
Comput. Secur., 2020

2018
Design of a Secure Encryption Model (SEM) for Cloud Data Storage Using Hadamard Transforms.
Wirel. Pers. Commun., 2018

2016
A BBN-Based Framework for Design Space Pruning of Application Specific Instruction Processors.
J. Circuits Syst. Comput., 2016

2015
Towards the Design of a Secure and Fault Tolerant Cloud Storage in a Multi-Cloud Environment.
Inf. Secur. J. A Glob. Perspect., 2015

2014
Complete hardware evolution based SoPC for evolvable hardware.
Appl. Soft Comput., 2014

2012
Optimization of single variable functions using complete hardware evolution.
Appl. Soft Comput., 2012

2010
Multicore Real Time Scheduling Using Fuzzified Priority and Non-uniform Laxity.
Proceedings of the CISIS 2010, 2010

2009
Application of non-uniform laxity to EDF for aperiodic tasks to improve task utilisation on multicore platforms
CoRR, 2009

Practical and scalable evolution of digital circuits.
Appl. Soft Comput., 2009

Pfairness Applied to EDF to Reduce Migration Overheads and Improve Task Schedulability in Multicore Platforms.
Proceedings of the ICPPW 2009, 2009

2008
Intrinsic Evolution of Large Digital Circuits Using a Modular Approach.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008

2005
Genetic learning based fault tolerant models for digital systems.
Appl. Soft Comput., 2005

Evolution of Asynchronous Sequential Circuits.
Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005

2004
Enhancing the Development Based Evolution of Digital Circuits.
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004

2003
JBits Based Fault Tolerant Framework for Evolvable Hardware.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

Exploring FPGA Structures for Evolving Fault Tolerant Hardware.
Proceedings of the 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 2003


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