A. N. Chandorkar

According to our database, A. N. Chandorkar authored at least 4 papers between 1996 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

Process variation aware dual-V_th assignment technique for low power nanoscale CMOS design.

Sudhakar S. Mande, Saurabh A. Chandorkar, A. N. Chandorkar

Microelectron. Reliab., 2011

2004

Design of Amplifier with Rail-to-Rail CMR with 1V Power Supply.

Srinjoy Mitra, A. N. Chandorkar

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Design of RF Tuner for Cable Modem Applications.

V. Veeresh Babu, Sumantra Seth, A. N. Chandorkar

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

1996

VLSI Implementation of Artificial Neural Network Based Digital Multiplier and Adder.

Ranjeet Ranade, Sanjay Bhandari, A. N. Chandorkar

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996