A. M. Majid

According to our database, A. M. Majid authored at least 10 papers between 2005 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Practical methods for extending ATE to 40 and 50Gbps.

David C. Keezer, Carl Edward Gray, Te-Hui Chen, Ashraf Majid

Proceedings of the 2013 IEEE International Test Conference, 2013

2011

Methods for extending high-performance automated test equipment (ATE) using multi-gigahertz FPGA technologies.

Ashraf M. Majid

PhD thesis, 2011

Multi-function multi-GHz ATE extension using state-of-the-art FPGAs.

A. M. Majid, David C. Keezer

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

Stretching the limits of FPGA SerDes for enhanced ATE performance.

A. M. Majid, David C. Keezer

Proceedings of the Design, Automation and Test in Europe, 2010

2009

A development platform and electronic modules for automated test up to 20 Gbps.

David C. Keezer, Carl Gray, A. M. Majid, Dany Minier, Patrice Ducharme

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test.

David C. Keezer, Dany Minier, Patrice Ducharme, A. M. Majid

Proceedings of the 2008 IEEE International Test Conference, 2008

2006

Multi-Gigahertz Testing of Wafer-Level Packaged Devices.

A. M. Majid, David C. Keezer, Jayasanker Jayabalan, Mihai Rotaru

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

Implementing multi-gigahertz test systems using CMOS FPGAs and PECL components.

David C. Keezer, Carl Gray, Ashraf Majid, Nafeez Taher

Proceedings of the 31st European Solid-State Circuits Conference, 2005

Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL.

David C. Keezer, Carl Gray, Ashraf M. Majid, Nafeez Taher

Proceedings of the 2005 Design, 2005

A 5 Gbps Wafer-Level Tester.

A. M. Majid, David C. Keezer, J. V. Karia

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005