A. Leandri

According to our database1, A. Leandri authored at least 4 papers between 2002 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Design and Evaluation of a Hardware on-line Program-Flow Checker for Embedded Microcontrollers.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

2003
Design of a fault tolerant solid state mass memory.
IEEE Trans. Reliab., 2003

2002
A self-checking cell logic block for fault tolerant FPGAs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Bit Flip Injection in Processor-Based Architectures: A Case Study.
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002


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