A. E. A. Almaini

According to our database, A. E. A. Almaini authored at least 18 papers between 1978 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

An Architecture Independent Packing Method for LUT-based Commercial FPGA.

Meng Yang, Jinmei Lai, A. E. A. Almaini

J. Comput., 2014

2013

Indirect connection aware attraction for FPGA clustering (abstract only).

Meng Yang, Jiarong Tong, A. E. A. Almaini

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2011

Reed-Muller function optimization techniques with onset table.

Lun-Yao Wang, Yinshui Xia, Xiexiong Chen, A. E. A. Almaini

J. Zhejiang Univ. Sci. C, 2011

State assignment for sequential circuits using multi-objective genetic algorithm.

B. A. Al Jassani, Neil Urquhart, A. E. A. Almaini

IET Comput. Digit. Tech., 2011

2010

Manipulation and optimisation techniques for Boolean logic.

B. A. Al Jassani, Neil Urquhart, A. E. A. Almaini

IET Comput. Digit. Tech., 2010

2008

Techniques for dual forms of Reed-Muller expansion conversion.

Meng Yang, Lingli Wang, Jiarong Tong, A. E. A. Almaini

Integr., 2008

2006

Fast Conversion for Large Canonical OR-Coincidence Functions.

Meng Yang, Lingli Wang, A. E. A. Almaini

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A Novel Multiple-Valued CMOS Flip-Flop Employing Multiple-Valued Clock.

Yinshui Xia, Lun-Yao Wang, A. E. A. Almaini

J. Comput. Sci. Technol., 2005

2004

Evolutionary Algorithms and Theirs Use in the Design of Sequential Logic Circuits.

B. Ali, A. E. A. Almaini, Tatiana Kalganova

Genet. Program. Evolvable Mach., 2004

2003

Power Minimization of FPRM Functions Based on Polarity Conversion.

Yinshui Xia, Xunwei Wu, A. E. A. Almaini

J. Comput. Sci. Technol., 2003

The Application of the Wavelet Transform to Polysomnographic Signals.

M. MacCallum, A. E. A. Almaini

Int. J. Wavelets Multiresolution Inf. Process., 2003

Area and power optimization of FPRM function based circuits.

Yinshui Xia, B. Ali, A. E. A. Almaini

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Best Polarity for Low Power XOR Gate Decomposition.

Yinshui Xia, A. E. A. Almaini

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

2001

Multilevel Logic Minimization Using Functional Don't Cares.

Lingli Wang, A. E. A. Almaini

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

1994

A Parallel CMOS 2's Complement Multiplier Based on 5: 3 Counter.

Z. Guan, P. Thomson, A. E. A. Almaini

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

1990

ASIC implementation of a programmable error-trapping decoder for binary codes of length 15.

A. E. A. Almaini, S. S. Aziz

Microprocess. Microsystems, 1990

An introduction to microcomputer systems architecture and interfacing: Fulcher, J Addison-Wesley, Workingham, UK (1989) pp 425.

A. E. A. Almaini

Microprocess. Microsystems, 1990

1978

Sequential Machine Implementations Using Universal Logic Modules.

A. E. A. Almaini

IEEE Trans. Computers, 1978