Robert Rutten
According to our database1,
Robert Rutten
authored at least 25 papers
between 2004 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2005
2010
2015
2020
0
1
2
3
4
5
6
1
2
1
1
1
1
1
1
3
1
1
1
1
2
1
1
1
2
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme.
IEEE J. Solid State Circuits, April, 2024
2023
A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
IEEE J. Solid State Circuits, 2022
A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction.
IEEE J. Solid State Circuits, 2022
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOS.
Proceedings of the 47th ESSCIRC 2021, 2021
2019
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2017
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2016
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers.
Microprocess. Microsystems, 2015
2013
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain using Carry-Save format numbers.
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013
Wideband UHF ISM-band transceiver supporting multichannel reception and DSSS modulation.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
A 45nm WCDMA transmitter using direct quadrature voltage modulator with high oversampling digital front-end.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
A 56 mW Continuous-Time Quadrature Cascaded ΣΔ Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band.
IEEE J. Solid State Circuits, 2007
A 56mW CT Quadrature Cascaded ΣΔ Modulator with 77dB DR in a Near Zero-IF 20MHz Band.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2004
A cascaded continuous-time ΣΔ Modulator with 67-dB dynamic range in 10-MHz bandwidth.
IEEE J. Solid State Circuits, 2004