Rahul Razdan

Orcid: 0000-0003-2092-3227

According to our database1, Rahul Razdan authored at least 21 papers between 1986 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
PolyFlows: Modular Test Framework Design for Autonomous Vehicles.
Proceedings of the IEEE International Conference on Mobility, 2024

Open-Source Level 4 Autonomous Shuttle for Last - Mile Mobility.
Proceedings of the 29th IEEE International Conference on Emerging Technologies and Factory Automation, 2024

2023
PolyVerif: An Open-Source Environment for Autonomous Vehicle Validation and Verification Research Acceleration.
IEEE Access, 2023

Demo: Modular Test Frameworks for PolyVerif Autonomous Vehicle Validation Environment.
Proceedings of the 48th IEEE Conference on Local Computer Networks, 2023

2021
An Overview of Autonomous Vehicles Sensors and Their Vulnerability to Weather Conditions.
Sensors, 2021

2018
Conceptual Sensors Testing Framework for Autonomous Vehicles.
Proceedings of the 2018 IEEE Vehicular Networking Conference, 2018

2009
Empirical results from the transformation of a large commercial technical computing environment.
Proceedings of the Third International Symposium on Empirical Software Engineering and Measurement, 2009

Future Directions in Reconfigurable Computing.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

EDA in flux: should I stay or should I go?
Proceedings of the 46th Design Automation Conference, 2009

1999
Verification of Systems-on-Chip Designs.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1997
Formal Implementation Verification of the Bus Interface Unit for the Alpha 21264 Microprocessor.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

The Alpha 21264: a 500 MHz out-of-order execution microprocessor.
Proceedings of the Proceedings IEEE COMPCON 97, 1997

1994
A high-performance microarchitecture with hardware-programmable functional units.
Proceedings of the 27th Annual International Symposium on Microarchitecture, San Jose, California, USA, November 30, 1994

PRISC Software Acceleration Techniques.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

1993
Clock suppression techniques for synchronous circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1991
Automatic Detection of MOS Synchronizers for Timing Verification.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Concurrent MIN-MAX simulation.
Proceedings of the conference on European design automation, 1991

1990
A global feedback detection algorithm for VLSI circuits.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Exploitation of Periodicity in Logic Simulation of Synchronous Circuits.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989
An Interactive Sequential Test Pattern Generation System.
Proceedings of the Proceedings International Test Conference 1989, 1989

1986
A Statistical Design Rule Developer.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986


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