Jie Chen

Affiliations:
  • George Washington University, Washington, DC, USA (PhD 2015)


According to our database1, Jie Chen authored at least 13 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Bibliography

2024
Special Session: Detecting and Defending Vulnerabilities in Heterogeneous and Monolithic Systems: Current Strategies and Future Directions.
Proceedings of the International Conference on Compilers, 2024

2016
Detecting Hardware Covert Timing Channels.
IEEE Micro, 2016

enDebug: A hardware-software framework for automated energy debugging.
J. Parallel Distributed Comput., 2016

2015
A Hardware-Software Cooperative Approach for Application Energy Profiling.
IEEE Comput. Archit. Lett., 2015

2014
Exploring Dynamic Redundancy to Resuscitate Faulty PCM Blocks.
ACM J. Emerg. Technol. Comput. Syst., 2014

CC-Hunter: Uncovering Covert Timing Channels on Shared Processor Hardware.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

An algorithm for detecting contention-based covert timing channels on shared hardware.
Proceedings of the HASP 2014, 2014

2013
JOP-alarm: Detecting jump-oriented programming-based anomalies in applications.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Watts-inside: A hardware-software cooperative approach for Multicore Power Debugging.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

2012
The Need for Power Debugging in the Multi-Core Environment.
IEEE Comput. Archit. Lett., 2012

RePRAM: Re-cycling PRAM faulty blocks for extended lifetime.
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks, 2012

2011
Energy-aware writes to non-volatile main memory.
ACM SIGOPS Oper. Syst. Rev., 2011

rPRAM: Exploring Redundancy Techniques to Improve Lifetime of PCM-based Main Memory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011


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