Jan van Sinderen

According to our database1, Jan van Sinderen authored at least 15 papers between 1998 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A worldwide-compliant 802.15.4/4z IR-UWB RFDAC transmitter in 28nm CMOS with 12dBm peak output power.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2017
F4: Wireless low-power transceivers for local and wide-area networks.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Impact of amplifier bandwidth limitations on gain-boosted N-path receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Session 26 overview: Wireless for IoE.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
Session 13 overview: Energy-efficient RF systems: RF & wireless subcommittees.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2013

2010
A 45nm WCDMA transmitter using direct quadrature voltage modulator with high oversampling digital front-end.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A Low-Power, Low-EVM, SAW-Less WCDMA Transmitter Using Direct Quadrature Voltage Modulation.
IEEE J. Solid State Circuits, 2009

A 45nm low-power SAW-less WCDMA transmit modulator using direct quadrature voltage modulation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
A 1.2V, 17dBm digital polar CMOS PA with transformer-based power interpolating.
Proceedings of the ESSCIRC 2008, 2008

2007
SiP Tuner With Integrated LC Tracking Filter for Both Cable and Terrestrial TV Reception.
IEEE J. Solid State Circuits, 2007


2005
Antenna and input stages of a 470-710 MHz silicon TV tuner for portable applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004
A 48-860 MHz TV splitter amplifier exhibiting an IIP2 and IIP3 of 94dBmV and 73dBmV.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

1998
A 3.5-mW, 2.5-GHz diversity receiver and a 1.2-mW, 3.6-GHz VCO in silicon on anything.
IEEE J. Solid State Circuits, 1998


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