Bo Yao

Affiliations:
  • Intel Corp., Hillsboro, OR, USA
  • Purdue University, School of Electrical and Computer Engineering, USA (PhD 2013)


According to our database1, Bo Yao authored at least 5 papers between 2010 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2017
Functional Broadside Test Generation Using a Commercial ATPG Tool.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2014
Built-in generation of functional broadside tests considering primary input constraints.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013
Transition faults and transition path delay faults: Test generation, path selection, and built-in generation of functional broadside tests
PhD thesis, 2013

Path selection based on static timing analysis considering input necessary assignments.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

2010
Deterministic broadside test generation for transition path delay faults.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010


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